174 lines
5.1 KiB
C
174 lines
5.1 KiB
C
/////////////////////////////////////////////////////////////////////////////////
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// Copyright (c) Electronic Arts Inc. All rights reserved.
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/////////////////////////////////////////////////////////////////////////////////
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#ifndef EASTL_ATOMIC_INTERNAL_ARCH_FETCH_ADD_H
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#define EASTL_ATOMIC_INTERNAL_ARCH_FETCH_ADD_H
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#if defined(EA_PRAGMA_ONCE_SUPPORTED)
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#pragma once
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#endif
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/////////////////////////////////////////////////////////////////////////////////
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//
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// void EASTL_ARCH_ATOMIC_FETCH_ADD_*_N(type, type ret, type * ptr, type val)
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//
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_8)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_8_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_8_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_8)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_8_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_8_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_8)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_8_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_8_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_8)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_8_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_8_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_8)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_8_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_8_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_16)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_16_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_16_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_16)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_16_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_16_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_16)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_16_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_16_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_16)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_16_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_16_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_16)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_16_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_16_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_32)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_32_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_32_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_32)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_32_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_32_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_32)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_32_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_32_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_32)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_32_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_32_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_32)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_32_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_32_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_64)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_64_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_64_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_64)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_64_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_64_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_64)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_64_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_64_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_64)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_64_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_64_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_64)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_64_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_64_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_128)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_128_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELAXED_128_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_128)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_128_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQUIRE_128_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_128)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_128_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_RELEASE_128_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_128)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_128_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_ACQ_REL_128_AVAILABLE 0
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#endif
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#if defined(EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_128)
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_128_AVAILABLE 1
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#else
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#define EASTL_ARCH_ATOMIC_FETCH_ADD_SEQ_CST_128_AVAILABLE 0
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#endif
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#endif /* EASTL_ATOMIC_INTERNAL_ARCH_FETCH_ADD_H */
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